1 ps8492d 11/13/08 block diagram pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver description pericom semiconductor?s pi49fct3805d/e is composed of non-inverting drivers. the outputs are con gured into 2 groups of one-in, ve-out with independent output enable. group b has an extra mon output. excellent output signals to power and ground ratio minimize power and ground noise and also improves output performance. features ? low output skew: <200ps ? switching frequency up to 166 mhz ? fast output rise/fall time: <1.0ns ? low propagation delay: <2.5ns ? low input capacitance: <6.0pf ? balanced cmos outputs ? industrial temperature: ?40c to +85c ? 3.3v 10% operation, 5v input tolerant ? packaging (pb-free & green available): ? 20-pin 300-mil wide soic (s) ? 20-pin 150-mil wide qsop (q) ? 20-pin 209-mil wide ssop (h) ? 20-pin 173-mil wide tssop (l) pin description pin name deescription oe x hi-z state output enable inputs (active low) in x clock inputs oa n , ob n clock outputs mon monitor output gnd ground v cc power truth table (1) inputs outputs oe x in x oa x mon llll lhhh hlzl hhzh note: 1. h = high voltage level, l = low voltage level, z = high impedance pin con g u ra tion v ccb v cc 120 ob0 oa0 2 19 ob1 oa1 3 18 gndb oa2 4 17 ob2 gnda 5 16 ob3 oa3 6 15 ob4 oa4 7 14 mon gndq 8 13 oeb oea 9 12 inb ina 10 11 oe b in a oa 0e4 in b oe a ob 0e4 mon 5 5 08-0298
2 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver storage temperature ................................................................. ?65c to +150c ambient temperature with power applied ................................ ?40c to +85c input voltage to gnd potential (inputs & v cc only) .................. ?0.5v to 5.5v output voltage to gnd potential (outputs & i/o only) ...?0.5v to +v cc +0.5v v cc input voltage ........................................................................ ?0.5v to +4.6v note: stresses greater than those listed under max i mum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other con di tions above those indicated in the operational sec tions of this speci cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) notes: 1. for max. or min. conditions, use appropriate value speci ed under electrical characteristics for the applicable device type. 2. typical values are at v cc = 3.3v, +25c ambient and maximum loading. 3. v oh = v cc ? 0.6v at rated current. 4. this parameter is determined by device characterization but is not production tested. 5. not more than one output should be shorted at one time. duration of the test should not exceed one second. dc electrical characteristics (t a = ?40c to +85c, v cc = 3.3v 0.3v) symbol parameters test conditions (1) min. typ. max. units v oh output high voltage v cc = min., v in = v il or v ih i oh = -0.1ma i oh = -8ma i oh = -12ma v cc -0.2 2.4 (3) 2.4 (3) - 3.0 3.0 v v ol output low voltage v cc = min., v in = v il or v ih i oh = 0.1ma i oh = 8ma i oh = 12ma - 0.2 0.3 0.2 0.4 0.4 v ih input high voltage low logic 2.0 5.5 v il input low voltage high logic -0.5 0.8 i ih input high current v cc = max., v in = 5.5v 1 a i il input low current v cc = max., v in = gnd -1 i ozh i ozl high impedance output current v cc = max., all outputs disabled v out = v cc v out = gnd 1 -1 v ik clamp diode voltage v cc = min., i in = -18ma -0.7 -1.2 v i odh output high current (4, 5) v out = 1.5v, v in = v il or v ih , v cc = 3.3v -40 -74 -100 ma i odl output low current (4, 5) v out = 1.5v, v in = v il or v ih , v cc = 3.3v 50 90 130 i os short circuit current (4, 5) v cc = max., v out = gnd -60 -100 -120 08-0298
3 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver notes: 1. for max. or min. conditions, use appropriate value speci ed under electrical characteristics for the applicable device. 2. typical values are at v cc = 3.3v, +25c ambient. 3. per ttl driven input (v in = v cc ? 0.6v); all other inputs at v cc or gnd. note: 1. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (1) de scrip tion test conditions typ max. units c in input capacitance v in = 0v 3.0 4 pf c out output capacitance v out = 0v ? 6 power supply characteristics parameters description test conditions (1) min. typ. (2) max. units i cc quiescent power supply current v cc = max. v in = gnd or v dd 0.1 30 a i dd dynamic supply current per output v cc = 3.6v, c l = 15pf, all outputs toggling 80 120 i c total power supply current v cc = 3.6v, c l = 15pf, all outputs toggling, f i = 133 mhz v in = v cc or gnd 100 135 ma/ mhz v in = v cc -0.6v or gnd 100 135 v cc = 3.6v, c l = 15pf, all outputs toggling, f i = 166 mhz v in = v cc or gnd 120 160 v in = v cc -0.6v or gnd 120 160 ?i cc supply current per inputs @ ttl high v cc = max. v in = v cc -0.6v (3) 45 300 a 08-0298
4 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver switching characteristics over operating range parameters de scrip tion test conditions (1) 3805d 3805e units max. max. t plh t phl propagation delay in n to o n c l = 15pf, 133 mhz (3805d) 166 mhz (3805e) 3.0 2.5 t r /t f clkn rist/fall time 0.8v ~ 2.0v 1.5 1.0 ns t sk(o) (3) pulse skew 270 270 ps t sk(p) (3) output skew 270 200 t sk(t) (3) package skew 550 550 t zl , t zh , t lz , t hz enable/disable time 5.2 5.0 ns f max input frequency 133 166 mhz switch position test switch disable low enable low 6v disable high enable high gnd all other inputs open de nitions: 1. c l = load capacitance: includes jig and probe capacitance. 2. r t = termination resistance: should be equal to z out of the pulse generator. tests circuit note: 1. these parameters are guaranteed by design 2. series resistor loading = 33 (see test circuit) pulse generator f = 125mhz d.u.t. 50 33 c l 15pf v cc enable/disable time test set-up pulse generator d.u.t. 500 33 50 500 c l 15pf v cc s 6v 08-0298
5 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver switching waveforms output skew ? t sk (o) pulse skew ? t sk (p) package skew ? t sk (t) propagation delay enable and disable times input t plh 3v 1.5 v 0v output v oh 1.5 v v ol t phl input tplhx 3v 1.5v 0v ox voh 1.5v vol tphlx tsk(o) oy voh 1.5v vol tsk(o) tplhy tphly tsk ( o ) = | tplh y e tplhx | or | tphl y e tphlx | t pzl oe 1.5 v 0v 3v 1.5v 3.0v 0v 1.5v t plz v ol 3.0 v 0v t pzh t phz 0.3v 0.3v output normally low o utput normally high switch closed switch open v oh enable disable t pzl oe 1.5 v 0v 3v 1.5v 3.0v 0v 1.5v t plz v ol 3.0 v 0v t pzh t phz 0.3v 0.3v output normally low o utput normally high switch closed switch open v oh enable disable input tplh1 3v 1.5v 0v package 1 output voh 1.5v vol tphl1 tsk(t) package 2 output voh 1.5v vol tsk(t) tplh2 tphl2 tsk(t) = | tplh2 e tplh1 | or | tphl2 e tphl1 | 08-0298
6 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver packaging mechanical: 20-pin 300-mil wide soic (s) 3 % ! 4 ) . ' 0 , ! . % " 3 #
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$ ! # pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com 08-0298
7 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver packaging mechanical: 20-pin 150-mil wide qsop (q) .337 .344 .053 .069 .004 .010 seating plane .025 bsc .007 .010 .228 .244 .150 .157 1 20 x.xx x.xx denotes dimensions in millimeters 0.635 8.56 8.74 1.35 1.75 5.79 6.19 0.101 0.254 .008 .012 0.203 0.305 3.81 3.99 0.178 0.254 .058 1.47 .015 x 45 ? 0.38 ref detail a detail a .008 0.20 min. guage plane .010 0.254 .041 1.04 ref .016 .035 0.41 0.89 0?-6? .008 .013 0.20 0.33 description: 20-pin, 150-mil wide, qsop package code: q document control no. pd - 1202 revision: h date: 10/22/07 note: 1) controlling dimensions in inches. 2) ref: jedec mo-137b/ad 3) dimensions do not include mold flash, protrusions or gate burrs pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com 08-0298
8 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver packaging mechanical: 20-pin 209-mil wide ssop (h) : 20-pin, 209-mil wide, ssop noitpircsed :edoc egakcap 1240 -dp :# lortnoc tnemucod e:noisiver 80/01/40 :etad h20 08-0140 08-0298
9 ps8492d 11/13/08 pi49fct3805d/e 3.3v, 2 x 1:5 cmos clock driver ordering information ordering code package code package description PI49FCT3805DHE h pb-free & green, 20-pin 209-mil ssop pi49fct3805dq q 20-pin 150-mil qsop pi49fct3805dqe q pb-free & green, 20-pin 150-mil qsop pi49fct3805dse s pb-free & green, 20-pin 300-mil soic pi49fct3805eh h 20-pin 209-mil ssop pi49fct3805eh h 20-pin 209-mil ssop pi49fct3805eq q 20-pin 150-mil qsop pi49fct3805eq q 20-pin 150-mil qsop pi49fct3805el l 20-pin 173-mil tssop pi49fct3805el l 20-pin 173-mil tssop notes: 1. thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. number of transistors = tbd pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com packaging mechanical: 20-pin 173-mil wide tssop (l) description: 20-pin, 173-mil wide, tssop package code: l document control no. pd - 1311 revision: e date: 03/09/05 pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com .252 .260 .047 1.20 .002 .006 seating plane .0256 bsc .018 .030 .004 .008 .238 .269 1 20 .169 .177 0.05 0.15 6.1 6.7 0.45 0.75 0.09 0.20 4.3 4.5 6.4 6.6 0.65 0.19 0.30 .007 .012 max note: 1. package outline exclusive of mold flash and metal burr 2. controlling dimentions in millimeters 3. ref: jedec mo-153f/ac 08-0298
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